Responsible Instructors |
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Course dates: | Every Tuesday and Friday from April 19th through June 10th (except May 6th). Exam on Wednesday June 22nd. | ||||||
Credits: | 5 GSC | ||||||
Course Contents | The realization of a useful quantum computer requires a large-scale circuit that computes while simultaneously fixing its inherent errors. Among fault-tolerant quantum error correcting schemes, the surface code is most promising, owing to its high error tolerance and two-dimensional architecture requiring only nearest-neighbor interactions between quantum bits. The required monitoring and control of quantum bits calls for fast classical logic. This course focuses on the development of hardware for the control of a number of qubits. | ||||||
Study Goals | The course will be an introduction to quantum computing, covering error quantum correction, fault tolerance, and surface codes. Labs will focus on the simulation, detection, and correction of errors using field- programmable-gate-arrays (FPGAs). Students will get familiar with the concepts of quantum computing while practicing to interface to a quantum computer in real life. | ||||||
Education Method | The course will focus on electronics for quantum computing, both ASICs and reconfigurable architectures. There will be weekly lectures & labs: 2-hour lecture on first day, 1-hour lecture + 1-hour exercises/lab or a 2-hour lab on second day. The lab will be available to students for completing assignments. | ||||||
Assessment | There will be a final exam and a project at the end of the quarter. 6 labs will receive a pass/no pass assessment. | ||||||
Registration | Via the form below. Delft students please also register via BlackBoard (course EE4575). |